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标题:Design Issues for Monolithic DC–DC Converters
时间:2020-11-21 16:45:56
DOI:10.1109/TPEL.2005.846527
大小:982 kb
页数:12 PAGES
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目录:
  • toc
    • Design Issues for Monolithic DC DC Converters
    • Surya Musunuri, Member, IEEE, Patrick L. Chapman, Member, IEEE,
      • I. I NTRODUCTION
      • II. IC F ABRICATION -L IMITATIONS FOR P OWER C ONVERTERS
      • III. R EALIZATION OF C ONVERTER C OMPONENTS
      • IV. R EALIZATION OF I NDUCTORS
        • A. On-Chip Planar, Spiral Inductors
    • Fig.€1. Spiral inductor geometry.
      • 1) Inductance Estimation: Inductance can be accurately calculate
        • Fig.€2. Variation of estimated inductance (in nH) from (1) (4) w
      • 2) Series Resistance of On-Chip Square, Spiral Inductor: There a
        • Sheet resistance: The sheet resistance for spiral inductors vari
        • Skin effect: The series resistance of the inductor increases wit
        • Proximity effect: This effect takes place when a conductor is un
        • Turn-bend resistance: The resistance due to turn-bend at each co
    • Fig.€3. Variation of estimated resistance (in ohms) of the spira
      • 3) Quality Factor of On-Chip Planar, Spiral Inductor: The qualit
    • Fig.€4. Variation of $Q$ -factor of spiral inductor with $n$ and
      • 4) On-Chip Planar, Spiral Inductor Layout Techniques: Design of
        • Multilayer spiral: If the CMOS process allows for more than two
        • Shapes of spiral: Various planar spiral structures are studied i
        • Varying width, spacing: Electromagnetic field simulation of plan
      • 5) Chip Area Calculation and Capacitance: Based on the above the
      • 6) Optimization of On-Chip Planar, Spiral Inductor: When $w\gg s
      • B. PDMA Inductor
    • Fig.€5. Micrograph of a first-generation inductor assembled by P
    • Fig.€6. Buck converter integrated circuit with PDMA inductor con
      • V. D ESIGN OF C APACITOR
        • A. Area of the Capacitor
    • Fig.€7. Layout of NMOS transistor. Five NMOS transistors are con
      • VI. D ESIGN OF T RANSISTOR
        • A. Parasitic Resistances
          • Lead resistance: The metal traces exhibit a series resistance du
          • Contact resistance: Each contact, between the metal and active l
          • Channel resistance: The drain current in the transistor is a non
          • Gate resistance: With the increase in the width of the transisto
        • B. Parasitic Capacitances
          • Gate capacitance: The total gate capacitance is the sum of gate
          • Drain/source capacitance: This capacitance has two components: (
        • C. Optimum Transistor Width for dc dc Converters
        • D. Area of the MOS Transistor
        • E. Current and Voltage Limits
      • VII. R ESULTS
    • Fig.€8. Frequency characteristics of planar, spiral inductor, an
    • Fig.€9. Measured $Q$ -factor of on-chip planar, spiral inductor,
    • Fig.€10. Output voltage of buck converter (using PDMA inductor)
    • Fig.€11. Output voltage of buck converter with PDMA inductor. Th
      • VIII. C ONCLUSION
      • L. Geng, Z. Chen, and J. Liu, Design of a hybrid monolithic swit
      • J. Liu, Z. Chen, and Z. Du, A new design of power supplies for p
      • S. Musunuri and P. L. Chapman, Optimization issues for fully-int
      • E. McShane and K. Shenai, A CMOS monolithic 5 MHz, 5 V, 250 mA,
      • A. Abedinpour, A. Trivedi, and K. Shenai, DC DC power converter
      • J. Zou, J. Chen, C. Liu, and J. Schutt-Aine, Plastic Deformation
      • S. Musunuri, P. L. Chapman, J. Zou, and C. Liu, Inductor design
      • S. Musunuri, P. L. Chapman, and P. L. Chapman, Multi-layer spira
      • C. P. Yue and S. S. Wong, Design strategy of on-chip inductors f
      • F. W. Grover, Inductance Calculations . Princeton, NJ: Van Nostr
      • H. Greenhouse, Design of planar rectangular microelectronic indu
      • S. S. Mohan, M. Hershenson, S. P. Boyd, and T. H. Lee, Simple an
      • C. P. Yue and S. S. Wong, Physical modeling of spiral inductors
      • J. M. Lopez-Villegas, J. Samitier, C. Cane, P. Losantos, and J.
      • N. Weste and K. Eshraghian, Principles of CMOS VLSI Design . Rea
    • (2005) The MOSIS Service . [Online] Available: http://www.mosis.

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