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标题:A 1.8-GHz Spur-Cancelled Fractional-N Frequency Synthesizer With LMS-Based DAC Gain Calibration
时间:2019-07-12 14:45:44
DOI:10.1109/JSSC.2006.884829
作者:Manoj Gupta;Bang-Sup Song
出版源: IEEE Journal of Solid-State Circuits ,2006 ,41 (12) :2842-2851
摘要:A 1.8-GHz Spur-Cancelled Fractional-N Frequency Synthesizer With LMS-Based DAC Gain Calibrationspur cancellationDelta-sigma modulationfractional-N frequency synthesizersphase-locked loopsA 1.8-GHz wideband DeltaSigma fractional-N frequency synthesizer achieves the phase noise performance of an integer-N synthesizer using a spur-cancellation digital-to-analog converter (DAC). The ...
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页数:11 PAGES
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