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标题:Integrating flipped drain and power gating techniques for efficient FinFET logic circuits
时间:2019-03-23 16:08:17
DOI:10.1002/jnm.2344
作者:Ajay Kumar Dadoria;Kavita Khare;T.K. Gupta;Uday Panwar
出版源: 《International Journal of Numerical Modelling E... ,2017 ,31 (4) :e2344
摘要:Integrating flipped drain and power gating techniques for efficient FinFET logic circuitsdrain gatingFDGTFinFETlow powerLSTPThis paper describes three novel techniques such as drain gating PMOS transistor (DGPT), drain gating NMOS transistor (DGNT) and drain gating NMOS–PMOS transistor (DGNPT) for mitigation of leakage power, which are proposed to be used for low-power...
大小:1603 kb
页数:15 PAGES
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